Thursday, June 10, 2010

AND Gate

The AND gate performs logical multiplication, commonly known as AND function. The AND gate has two or more inputs and single output. The output of AND gate is HIGH only when all its inputs are HIGH (i.e. even if one input is LOW, Output will be LOW). If X and Y are two inputs, then output F can be represented mathematically as F = X.Y, Here dot (.) denotes the AND operation. Truth table and symbol of the AND gate is shown in the figure above.

Truth Table For AND gate

INPUT OUTPUT
A B A AND B
0 0 0
0 1 0
1 0 0
1 1 1

AND Gate using Diodes We use the same logic levels, but the diodes are reversed and the resistor is set to pull the output voltage up to a logic 1 state. For this example, +V = +5 volts, although other voltages can just as easily be used. Now, if both inputs are unconnected or if they are both at logic 1, output Z will be at logic 1. If either input is grounded (logic 0), that diode will conduct and will pull the output down to logic 0 as well. Both inputs must be logic 1 in order for the output to be logic 1, so this circuit performs the logical AND function.

AND Gate using Transistors

A simple 2-input logic AND gate can be constructed using transistor switches connected together as shown below with the inputs connected directly to the transistor bases.

Types of AND IC's

TTL Logic Types CMOS Logic Types
74LS08 Quad 2-input CD4081 Quad 2-input
74LS11 Triple 3-input CD4073 Triple 3-input
74LS21 Dual 4-input CD4082 Dual 4-input

Application of AND Gate

  • Garden Floodlight System
  • subsystem diagram
This will be discussed in detail later

Logic Blocks in Digital Basics

Depending upon how these "switches" and "inverters" are arranged in integrated circuits we are able to obtain "logic blocks" to perform various tasks. In figure 2 we look at some of the most basic logic blocks. In the first set of switches A, B, and C they are arranged in "series" so that for the input to reach the output all the switches must be closed. This may be considered an "AND-GATE".

In the second set of switches A, B, and C they are arranged in "parallel" so that for any input to reach the output any one of the switches may be closed. This may be considered an "OR-GATE".

These are considered the basic building blocks in digital logic. If we added "inverters" to either of those blocks, called "gates", then we achieve a "NAND-GATE" and a "NOR-GATE" respectively.

Here in figure 3 we examine the digital basics in schematic form. Now here we have depicted four major logic blocks AND-GATE, NAND-GATE, OR-GATE and NOR-GATE plus the inverter. Firstly the "1's" and the "0's" or otherwise known as the "ones" and "zeros". A "1" is a HIGH voltage (usually the voltage supply) and the "0" is no voltage or ground potential. Other people prefer designating "H" and "L" for high and low instead of the "1's" and the "0's". Stick with which system you feel most comfortable. Several interesting points emerge here. Of interest to the next section on binary numbers is the pattern of all the inputs for each logic block. Not only are they identical but, for only two inputs A and B there are four possible output situations which are called "states". These are digital basics. There actually can be many numbers of inputs. An eight input NAND-GATE is a common and quite useful digital logic block. Next of particular interest is if you study them very carefully, that for the very identical inputs, each of these logic blocks gives us a totally different output result. Compare them. Finally for the same inputs the NOR-GATE outputs are the direct opposite to the AND-GATE outputs while the OR-GATE outputs are the direct opposite to the NAND-GATE outputs.

Digital Electronics Basic Principle

Digital circuits work on the basis of a transistor being used as a switch. Consider a light switch, a transistor can be considered almost the same and in some circuits transistors are used to control large amounts of power with very little input power being used. Look at figure 1 below. Here are two crude transistor switch circuits. In the first circuit if there is no voltage applied to the base of Q1 then it is not switched "on" and accordingly the + 5V passing through the 10K load resistor from our + 5V supply appears at both the collector of the transistor and also at output 1. If we apply + 5V to the base of Q1 then because it is greater than 0.7 V than the grounded emitter, Q1 will switch on just like a light switch causing the + 5V from our supply to drop entirely across the 10K load resistor. This load could also be replaced by a small light bulb, relay or LED in conjunction with a resistor of suitable value. In any event the bulb or led would light or the relay would close. The basic principle in digital basics is that we have just created an "electronic switch" where the positive voltage on the base produces zero voltage at the output and zero voltage on the input produces the + 5V on the output. The output is always the opposite to the input and in digital basics terms this is called an "inverter" a very important property. Now looking at Q2 and Q3 to the right of the schematic we simply have two inverters chained one after the other. Here if you think it through the final output 2 from Q3 will always follow the input given to Q2. This in digital basics is your basic transistor switch.

Wednesday, June 9, 2010

Forward and reverse bias in pn junctions

We now consider a p-n diode with an applied bias voltage, Va. A forward bias corresponds to applying a positive voltage to the anode (the p-type region) relative to the cathode (the n-type region). A reverse bias corresponds to a negative voltage applied to the cathode. Both bias modes are illustrated with Figure below. The applied voltage is proportional to the difference between the Fermi energy in the n-type and p-type quasi-neutral regions. As a negative voltage is applied, the potential across the semiconductor increases and so does the depletion layer width. As a positive voltage is applied, the potential across the semiconductor decreases and with it the depletion layer width. The total potential across the semiconductor equals the built-in potential minus the applied voltage,

The built-in potential

The built-in potential in a semiconductor equals the potential across the depletion region in thermal equilibrium. Since thermal equilibrium implies that the Fermi energy is constant throughout the p-n diode, the built-in potential equals the difference between the Fermi energies, EFn and EFp, divided by the electronic charge. It also equals the sum of the bulk potentials of each region, fn and fp, since the bulk potential quantifies the distance between the Fermi energy and the intrinsic energy. This yields the following expression for the built-in potential.
Example 2 An abrupt silicon p-n junction consists of a p-type region containing 2 x 10^16 cm-3 acceptors and an n-type region containing also 10^16 cm-3 acceptors in addition to 10^17 cm-3 donors. 1. Calculate the thermal equilibrium density of electrons and holes in the p-type region as well as both densities in the n-type region. 2. Calculate the built-in potential of the p-n junction 3. Calculate the built-in potential of the p-n junction at 400 K..
Solution where the instrinsic carrier density at 400 K was obtained from example1 1. The thermal equilibrium densities are: In the p-type region: p = Na = 2 x 10^16 cm-3 n = ni^2/p = 10^20/2 x 10^16 = 5 x 103 cm-3 In the n-type region n = Nd - Na = 9 x 10^16 cm-3 p = ni2/n = 10^20/(1 x 10^16) = 1.11 x 10^3 cm-3 2 The built-in potential is obtained from: 3.Similarly, the built-in potential at 400 K equals:

Thermal equilibrium for pn junctions

To reach thermal equilibrium, electrons/holes close to the metallurgical junction diffuse across the junction into the p-type/n-type region where hardly any electrons/holes are present. This process leaves the ionized donors (acceptors) behind, creating a region around the junction, which is depleted of mobile carriers. We call this region the depletion region, extending from x = -xp to x = xn. The charge due to the ionized donors and acceptors causes an electric field, which in turn causes a drift of carriers in the opposite direction. The diffusion of carriers continues until the drift current balances the diffusion current, thereby reaching thermal equilibrium as indicated by a constant Fermi energy. This situation is shown in Figure below While in thermal equilibrium no external voltage is applied between the n-type and p-type material, there is an internal potential, fi, which is caused by the workfunction difference between the n-type and p-type semiconductors. This potential equals the built-in potential, which will be further discussed in the next section

Flatband diagram of pn Junctions

The principle of operation will be explained using a gedanken experiment, an experiment, which is in principle possible but not necessarily executable in practice. We imagine that one can bring both semiconductor regions together, aligning both the conduction and valence band energies of each region. This yields the so-called flatband diagram shown in Figure below Note that this does not automatically align the Fermi energies, EF,n and EF,p. Also, note that this flatband diagram is not an equilibrium diagram since both electrons and holes can lower their energy by crossing the junction. A motion of electrons and holes is therefore expected before thermal equilibrium is obtained. The diagram shown in Figure above (b) is called a flatband diagram. This name refers to the horizontal band edges. It also implies that there is no field and no net charge in the semiconductor.

Structure and principle of operation of pn junction

A p-n junction consists of two semiconductor regions with opposite doping type as shown in Figure below. The region on the left is p-type with an acceptor density Na, while the region on the right is n-type with a donor density Nd. The dopants are assumed to be shallow, so that the electron (hole) density in the n-type (p-type) region is approximately equal to the donor (acceptor) density. We will assume, unless stated otherwise, that the doped regions are uniformly doped and that the transition between the two regions is abrupt. We will refer to this structure as an abrupt p-n junction. Frequently we will deal with p-n junctions in which one side is distinctly higher-doped than the other. We will find that in such a case only the low-doped region needs to be considered, since it primarily determines the device characteristics. We will refer to such a structure as a one-sided abrupt p-n junction. The junction is biased with a voltage Va as shown in Figure above. We will call the junction forward-biased if a positive voltage is applied to the p-doped region and reversed-biased if a negative voltage is applied to the p-doped region. The contact to the p-type region is also called the anode, while the contact to the n-type region is called the cathode, in reference to the anions or positive carriers and cations or negative carriers in each of these regions.

Sunday, June 6, 2010

Temperature dependence of the energy bandgap

The energy bandgap of semiconductors tends to decrease as the temperature is increased. This behavior can be understood if one considers that the interatomic spacing increases when the amplitude of the atomic vibrations increases due to the increased thermal energy. This effect is quantified by the linear expansion coefficient of a material. An increased interatomic spacing decreases the average potential seen by the electrons in the material, which in turn reduces the size of the energy bandgap. A direct modulation of the interatomic distance - such as by applying compressive (tensile) stress - also causes an increase (decrease) of the bandgap. The temperature dependence of the energy bandgap, Eg, has been experimentally determined yielding the following expression for Eg as a function of the temperature, T: where Eg(0), a and b are the fitting parameters. These fitting parameters are listed for germanium, silicon and gallium arsenide in Table below A plot of the resulting bandgap versus temperature is shown in Figure below for germanium, silicon and gallium arsenide.
Example 1 Calculate the energy bandgap of germanium, silicon and gallium arsenide at 300, 400, 500 and 600 K.
Solution The bandgap of silicon at 300 K equals: Similarly one finds the energy bandgap for germanium and gallium arsenide, as well as at different temperatures, yielding:

Saturday, June 5, 2010

The Kronig-Penney model

The Kronig-Penney model demonstrates that a simple one-dimensional periodic potential yields energy bands as well as energy band gaps. While it is an oversimplification of the three-dimensional potential and bandstructure in an actual semiconductor crystal, it is an instructive tool to demonstrate how the band structure can be calculated for a periodic potential, and how allowed and forbidden energies are obtained when solving the corresponding Schrödinger equation. The Kronig-Penney consists of an infinite series of rectangular barriers with potential height, V0, and width, b, separated by a distance, a-b, resulting in a periodic potential with period, a. The analysis requires the use of Bloch functions, traveling wave solutions multiplied with a periodic function, which has the same periodicity as the potential Solutions for k and E are obtained when the following equation is satisfied:

This equation can only be solved numerically. Solutions are only obtained if the function, F, is between -1 and 1 since it has to equal cos(ka). The energy, E, is plotted as function of ka/p and the function F in Figure

The corresponding band structure is shown below (black curve) as well as the energy for a free electron (gray curve). Three different forms are presented, namely the E(k) digram, the E(k diagram combined with the reduced-zone diagram as well as the reduced-zone diagram only. From Figure above.a we observe the following: The E(k) relation resembles a parabola except that only specific ranges of energies are valid solutions to Schrödinger's equation and therefore are allowed, while others are not. The range of energies for which there is no solution is referred to as an energy band gap. The transitions between allowed and forbidden energies occur at non-zero integer multiples of ka/p. These correspond to local minima and maxima of the E(k) relation. The reduced-zone diagram shown in Figure above.c contains the first three bands and energy bandgaps. For instance the second energy bandgap occurs between 1.5 and 2 eV, between the band maximum of the second band and the band minimum of the third band.

Periodic potentials

The analysis of periodic potentials is required to find the energy levels in a semiconductor. This requires the use of periodic wave functions, called Bloch functions which are beyond the scope of this text. The result of this analysis is that the energy levels are grouped in bands, separated by energy band gaps. The behavior of electrons at the bottom of such a band is similar to that of a free electron. However, the electrons are affected by the presence of the periodic potential. The combined effect of the periodic potential is included by adjusting the value of the electron mass. This mass will be referred to as the effective mass. The effect of a periodic arrangement on the electron energy levels is illustrated by Figure below Shown are the energy levels of electrons in a carbon crystal with the atoms arranged in a diamond lattice. These energy levels are plotted as a function of the lattice constant, a. Isolated carbon atoms contain six electrons, which occupy the 1s, 2s and 2p orbital in pairs. The energy of an electron occupying the 2s and 2p orbital is indicated on the figure. The energy of the 1s orbital is not shown. As the lattice constant is reduced, there is an overlap of the electron wavefunctions occupying adjacent atoms. This leads to a splitting of the energy levels consistent with the Pauli exclusion principle. The splitting results in an energy band containing 2N states in the 2s band and 6N states in the 2p band, where N is the number of atoms in the crystal. A further reduction of the lattice constant causes the 2s and 2p energy bands to merge and split again into two bands containing 4N states each. At zero Kelvin, the lower band is completely filled with electrons and labeled as the valence band. The upper band is empty and labeled as the conduction band.

Free electron model

The free electron model of metals has been used to explain the photo-electric effect . This model assumes that electrons are free to move within the metal but are confined to the metal by potential barriers as illustrated by Figure below. The minimum energy needed to extract an electron from the metal equals qFM, where FM is the workfunction. This model is frequently used when analyzing metals. However, this model does not work well for semiconductors since the effect of the periodic potential due to the atoms in the crystal has been ignored.

a)The free electron model of a metal

 
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